MOSFET transistors capable of handling high voltages have been used in power applications. Most power MOSFETs are of the DMOS (double diffused MOS) construction which inherently has a large drain-to-source parasitic capacitance. Power MOSFETs constructed by other processes may additionally have large gate-to-drain overlap capacitance. The large drain-to-source parasitic capacitance in effect increases the load capacitance, while the gate-to-drain overlap parasitic capacitance appears as an input capacitance augmented by the gain of the transistor. These parasitic capacitances adversely affect the transistor's performance when operating at high frequencies. Therefore, it is desirable to reduce the parasitic capacitances to improve the performance of a power MOSFET.
It is also beneficial to reduce or eliminate undesirable phenomena in a power transistor such as avalanche breakdown, hot electron stress, and punch-through to improve its performance. Conventional MOSFET transistors have the drain junction in direct contact with the p+ channel stop, therefore requiring a low doping concentration in the junction to maintain a high breakdown voltage. However, the lowered doping concentration also leads to an undesirable higher parasitic drain resistance. Some conventional MOSFET devices have the drain junction lying directly beneath the gate electrode, so that if the drain is biased at a large voltage, a drain induced tunneling current appears. This tunneling current may initiate an avalanche breakdown.
Hot electron stress is a phenomenon that may occur in a conventional MOSFET transistor under high current flow conditions. Hot holes generated in the pinch off region create traps in the oxide at the drain end of the channel. Electrons become caught in these traps and their accumulation induces stress in the gate oxide. The stress causes the transistor's performance to deteriorate, and in some instances, the stress is sufficient to cause destruction of the device.
Punch-through occurs with large drain biasing so that the drain depletion region grows to the point that the inverted channel vanishes. The result is a depletion region that extends from drain to source with carriers injected at the source driven to the drain by the high electrical field between the electrodes. Punch-through in effect adversely lowers the breakdown voltage of the device.
Accordingly, it is desirable to provide a MOSFET transistor which has reduced drain-to-source and gate-to-drain overlap capacitances that adversely affect the high frequency performance of the transistor. It is further desirable that the MOSFET transistor also has improved device parameters, such as breakdown voltage and threshold voltage, for improved high voltage and large current handling. Additionally, it is desirable to substantially reduce or eliminate the disadvantageous effects in the MOSFET transistor due to detrimental phenomena such as hot electron stress and punch-through.